2013年4月18日 星期四

一位元加法器


module top;
system_clock #400 clock1(C);
system_clock #200 clock2(A);
system_clock #100 clock3(B);
adder1 M1(Cout, Sum, A, B, C);
endmodule

module adder1(Cout, Sum, A, B, C);
output Cout,Sum;
input A,B,C;


not I1(notA,A);
not I2(notB,B);
not I3(notC,C);

and I4(s1,A,B);
and I5(s2,B,C);
and I6(s3,A,C);
and I7(s4,notA,B,notC);
and I8(s5,A,notB,notC);
and I9(s6,notA,notB,C);
and I10(s7,A,B,C);

or I11(Cout,s1,s2,s3);
or I12(Sum,s4,s5,s6,s7);

endmodule

module system_clock(clk);
parameter PERIOD=100;
output clk;
reg clk;

initial clk=0;

always
 begin
#(PERIOD/2) clk=~clk;
 end

always@(posedge clk)
 if($time>1000)$stop;

endmodule